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Galvanostatic Plating with a Single Additive Electrolyte for Bottom-Up Filling of Copper in Mesoscale TSVs

Journal Article · · Journal of the Electrochemical Society
DOI:https://doi.org/10.1149/2.0271901jes· OSTI ID:1492855

A methanesulfonic acid (MSA) electrolyte with a single suppressor additive was used for potentiostatic bottom-up filling of copper in mesoscale through silicon vias (TSVs). Conversly, galvanostatic deposition is desirable for production level full wafer plating tools as they are typically not equipped with reference electrodes which are required for potentiostatic plating. Potentiostatic deposition was used to determine the over-potential required for bottom-up TSV filling and the resultant current was measured to establish a range of current densities to investigate for galvanostatic deposition. Galvanostatic plating conditions were then optimized to achieve void-free bottom-up filling in mesoscale TSVs for a range of sample sizes.

Research Organization:
Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)
Sponsoring Organization:
USDOE National Nuclear Security Administration (NNSA)
Grant/Contract Number:
AC04-94AL85000
OSTI ID:
1492855
Report Number(s):
SAND--2018-9018J; 667176
Journal Information:
Journal of the Electrochemical Society, Journal Name: Journal of the Electrochemical Society Journal Issue: 1 Vol. 166; ISSN 0013-4651
Publisher:
The Electrochemical SocietyCopyright Statement
Country of Publication:
United States
Language:
English

References (33)

3D integration review journal May 2011
Curvature enhanced adsorbate coverage mechanism for bottom-up superfilling and bump control in damascene processing journal November 2007
Bottom-up filling optimization for efficient TSV metallization journal March 2010
Wafer-level bonding/stacking technology for 3D integration journal April 2010
Through-glass copper via using the glass reflow and seedless electroplating processes for wafer-level RF MEMS packaging journal June 2013
Copper electrodeposition for 3D integration conference April 2008
High aspect ratio TSV copper filling with different seed layers conference May 2008
Through silicon via technology — processes and reliability for wafer-level 3D system integration conference May 2008
High frequency characterization and analytical modeling of through glass via (TGV) for 3D thin-film interposer and MEMS packaging conference May 2013
Process integration and challenges of Through Silicon Via (TSV) on silicon-on insulator (SOI) substrate for 3D heterogeneous applications conference December 2015
Process compatible polysilicon-based electrical through-wafer interconnects in silicon substrates journal December 2002
Double-Sided Process for MEMS SOI Sensors With Deep Vertical Thru-Wafer Interconnects journal April 2018
Through-Silicon Via (TSV) journal January 2009
Copper electrodeposition for 3D integration conference April 2008
Through-Silicon Via (TSV) journal January 2009
Superconformal Bottom-up Nickel Deposition in High Aspect Ratio through Silicon Vias journal August 2016
High-Aspect-Ratio Copper Via Filling Used for Three-Dimensional Chip Stacking journal January 2003
High-Aspect-Ratio Copper-Via-Filling for Three-Dimensional Chip Stacking journal January 2005
Changing Superfilling Mode for Copper Electrodeposition in Blind Holes from Differential Inhibition to Differential Acceleration journal January 2009
MSA as a Supporting Electrolyte in Copper Electroplating for Filling of Damascene Trenches and Through Silicon Vias journal January 2011
Superconformal Copper Deposition in Through Silicon Vias by Suppression-Breakdown journal January 2018
Extreme Bottom-up Filling of Through Silicon Vias and Damascene Trenches with Gold in a Sulfite Electrolyte journal January 2013
Bottom-Up Copper Filling of Large Scale Through Silicon Vias for MEMS Technology journal November 2018
Modeling Extreme Bottom-Up Filling of Through Silicon Vias journal January 2012
Leveler Effect and Oscillatory Behavior during Copper Electroplating journal January 2012
Extreme Bottom-Up Superfilling of Through-Silicon-Vias by Damascene Processing: Suppressor Disruption, Positive Feedback and Turing Patterns journal January 2012
Spatial-Temporal Modeling of Extreme Bottom-up Filling of Through-Silicon-Vias journal January 2013
Superconformal Bottom-Up Nickel Deposition in High Aspect Ratio Through Silicon Vias journal January 2016
Copper Electrodeposition for 3D Integration text January 2008
Curvature enhanced adsorbate coverage mechanism for bottom-up superfilling and bump control in damascene processing text January 2014
Curvature enhanced adsorbate coverage mechanism for bottom-up superfilling and bump control in damascene processing text January 2014
Spatial-Temporal Modeling of Extreme Bottom-up Filling of Through-Silicon-Vias text January 2014
Spatial-Temporal Modeling of Extreme Bottom-up Filling of Through-Silicon-Vias text January 2014

Cited By (3)

Bottom-Up Copper Filling of Large Scale Through Silicon Vias for MEMS Technology journal November 2018
Bromide Ion as a Leveler for High-Speed TSV Filling journal January 2019
Inhibition Effect of CTAB on Electrodeposition of Cu in Micro Via: Experimental and MD Simulation Investigations journal January 2019

Figures / Tables (7)


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