Improving wafer-scale Josephson junction resistance variation in superconducting quantum coherent circuits

Kreikebaum, J. M.; O’Brien, K. P.; Morvan, A.; Siddiqi, I.

doi:10.1088/1361-6668/ab8617

Improving wafer-scale Josephson junction resistance variation in superconducting quantum coherent circuits

Journal Article · Wed Apr 29 04:00:00 EDT 2020 · Superconductor Science and Technology

DOI:https://doi.org/10.1088/1361-6668/ab8617· OSTI ID:1650101

^[1]; O’Brien, K. P. ^[2]; Morvan, A. ^[3]; Siddiqi, I. ^[1]

Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Univ. of California, Berkeley, CA (United States)
Massachusetts Inst. of Technology (MIT), Cambridge, MA (United States)
Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)

Quantum bits, or qubits, are an example of coherent circuits envisioned for next-generation computers and detectors. A robust superconducting qubit with a coherent lifetime of O(100 µs) is the transmon: a Josephson junction functioning as a non-linear inductor shunted with a capacitor to form an anharmonic oscillator. In a complex device with many such transmons, precise control over each qubit frequency is often required, and thus variations of the junction area and tunnel barrier thickness must be sufficiently minimized to achieve optimal performance while avoiding spectral overlap between neighboring circuits. Simply transplanting our recipe optimized for single, stand-alone devices to wafer-scale (producing 64, 1x1 cm dies from a 150 mm wafer) initially resulted in global drifts in room-temperature tunneling resistance of ± 30%. Inferring a critical current variation from this resistance distribution, we present an optimized process developed from a systematic 38 wafer study that results in < 3.5% relative standard deviation (RSD) in critical current () for 3000 Josephson junctions (both single-junctions and asymmetric SQUIDs) across an area of 49 cm². Looking within a 1x1 cm moving window across the substrate gives an estimate of the variation characteristic of a given qubit chip. Our best process, utilizing ultrasonically assisted development, uniform ashing, and dynamic oxidation has shown = 1.8% within 1x1 cm, on average, with a few 1x1 cm areas having < 1.0% (equivalent to < 0.5%). Such stability would drastically improve the yield of multi-junction chips with strict critical current requirements.

View Accepted Manuscript (DOE)

Research Organization:: Lawrence Berkeley National Laboratory (LBNL), Berkeley, CA (United States)

Sponsoring Organization:: USDOE Office of Science (SC)

Grant/Contract Number:: AC02-05CH11231

OSTI ID:: 1650101

Alternate ID(s):: OSTI ID: 23017426

Journal Information:: Superconductor Science and Technology, Journal Name: Superconductor Science and Technology Journal Issue: 6 Vol. 33; ISSN 0953-2048

Publisher:: IOP PublishingCopyright Statement

Country of Publication:: United States

Language:: English

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