Scalable and Direct Growth of Graphene Micro Ribbons on Dielectric Substrates

Wang, Debin; Tian, He; Yang, Yi; Xie, Dan; Ren, Tian-Ling; Zhang, Yuegang

doi:10.1038/srep01348

Title: Scalable and Direct Growth of Graphene Micro Ribbons on Dielectric Substrates

Journal Article · Wed Feb 27 00:00:00 EST 2013 · Scientific Reports

DOI:https://doi.org/10.1038/srep01348· OSTI ID:1624597

Wang, Debin ^[1]; Tian, He ^[2]; Yang, Yi ^[3]; Xie, Dan ^[3]; Ren, Tian-Ling ^[3]; Zhang, Yuegang ^[4]

Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States). Molecular Foundry. Materials Science Division
Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States). Molecular Foundry. Materials Science Division; Tsinghua Univ., Beijing (China). Inst. of Microelectronics; Tsinghua Univ., Beijing (China). Tsinghua National Lab. for Information Science and Technology (TNList)
Tsinghua Univ., Beijing (China). Inst. of Microelectronics; Tsinghua Univ., Beijing (China). Tsinghua National Lab. for Information Science and Technology (TNList)
Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States). Molecular Foundry. Materials Science Division; Chinese Academy of Sciences (CAS), Suzhou (China). Suzhou Inst. of Nano-Tech and Nano-Bionics

Here we report on a scalable and direct growth of graphene micro ribbons on SiO2 dielectric substrates using a low temperature chemical vapor deposition. Due to the fast annealing at low temperature and dewetting of Ni, continuous few-layer graphene micro ribbons grow directly on bare dielectric substrates through Ni assisted catalytic decomposition of hydrocarbon precursors. These high quality graphene micro ribbons exhibit low sheet resistance of ,700 V 22100 V, high on/off current ratio of ,3, and high carrier mobility of ,655 cm2 V21 s21 at room temperature, all of which have shown significant improvement over other lithography patterned CVD graphene micro ribbons. This direct approach can in principle form graphene ribbons of any arbitrary sizes and geometries. It allows for a feasible methodology towards better integration with semiconductor materials for interconnect electronics and scalable production for graphene based electronic and optoelectronic applications where the electrical gating is the key enabling factor.

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Research Organization:: Lawrence Berkeley National Laboratory (LBNL), Berkeley, CA (United States)

Sponsoring Organization:: USDOE Office of Science (SC), Basic Energy Sciences (BES). Materials Sciences & Engineering Division

Grant/Contract Number:: AC02-05CH11231

OSTI ID:: 1624597

Journal Information:: Scientific Reports, Vol. 3, Issue 1; ISSN 2045-2322

Publisher:: Nature Publishing GroupCopyright Statement

Country of Publication:: United States

Language:: English

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