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NUMA-Aware Thread Scheduling for Big Data Transfers over Terabits Network Infrastructure

Journal Article · · Scientific Programming
DOI:https://doi.org/10.1155/2018/4120561· OSTI ID:1565699
 [1];  [1];  [1];  [2];  [3]
  1. Sogang Univ., Seoul (Korea)
  2. Ajou Univ., Suwon (Korea)
  3. Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
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The evergrowing trend of big data has led scientists to share and transfer the simulation and analytical data across the geodistributed research and computing facilities. However, the existing data transfer frameworks used for data sharing lack the capability to adopt the attributes of the underlying parallel file systems (PFS). LADS (Layout-Aware Data Scheduling) is an end-to-end data transfer tool optimized for terabit network using a layout-aware data scheduling via PFS. However, it does not consider the NUMA (Nonuniform Memory Access) architecture. In this paper, we propose a NUMA-aware thread and resource scheduling for optimized data transfer in terabit network. First, we propose distributed RMA buffers to reduce memory controller contention in CPU sockets and then schedule the threads based on CPU socket and NUMA nodes inside CPU socket to reduce memory access latency. We design and implement the proposed resource and thread scheduling in the existing LADS framework. Experimental results showed from 21.7% to 44% improvement with memory-level optimizations in the LADS framework as compared to the baseline without any optimization.

Research Organization:
Oak Ridge National Laboratory (ORNL), Oak Ridge, TN (United States). Oak Ridge Leadership Computing Facility (OLCF)
Sponsoring Organization:
USDOE Office of Science (SC)
OSTI ID:
1565699
Journal Information:
Scientific Programming, Journal Name: Scientific Programming Vol. 2018; ISSN 1058-9244
Publisher:
HindawiCopyright Statement
Country of Publication:
United States
Language:
English

References (3)

Globus Toolkit Version 4: Software for Service-Oriented Systems journal July 2006
Analysis of NUMA effects in modern multicore systems for the design of high-performance data transfer applications journal September 2017
RAMSYS: Resource-Aware Asynchronous Data Transfer with Multicore SYStems journal May 2017

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Related Subjects

97 MATHEMATICS AND COMPUTING
Computer Science