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Title: Engineering Nanowire n-MOSFETs at $$L_{g}<8~{\rm nm}$$

Journal Article · · IEEE Transactions on Electron Devices

As metal-oxide-semiconductor field-effect transistors (MOSFETs) channel lengths ( Lg ) are scaled to lengths shorter than Lg <; 8 nm source-drain tunneling starts to become a major performance limiting factor. In this scenario, a heavier transport mass can be used to limit source-drain (S-D) tunneling. Taking InAs and Si as examples, it is shown that different heavier transport masses can be engineered using strain and crystal-orientation engineering. Full-band extended device atomistic quantum transport simulations are performed for nanowire MOSFETs at Lg <; 8 nm in both ballistic and incoherent scattering regimes. In conclusion, a heavier transport mass can indeed be advantageous in improving ON-state currents in ultrascaled nanowire MOSFETs.

Research Organization:
Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States). Oak Ridge Leadership Computing Facility (OLCF)
Sponsoring Organization:
USDOE Office of Science (SC)
OSTI ID:
1565075
Journal Information:
IEEE Transactions on Electron Devices, Vol. 60, Issue 7; ISSN 0018-9383
Publisher:
IEEE
Country of Publication:
United States
Language:
English

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