Compressed optimization of device architectures
- Univ. of Wisconsin, Madison, WI (United States). Dept. of Physics
- Microsoft Research, Redmond, WA (United States). Quantum Architectures and Computation Group
- Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Center for Computing Research
Recent advances in nanotechnology have enabled researchers to control individual quantum mechanical objects with unprecedented accuracy, opening the door for both quantum and extreme- scale conventional computation applications. As these devices become more complex, designing for facility of control becomes a daunting and computationally infeasible task. Here, motivated by ideas from compressed sensing, we introduce a protocol for the Compressed Optimization of Device Architectures (CODA). It leads naturally to a metric for benchmarking and optimizing device designs, as well as an automatic device control protocol that reduces the operational complexity required to achieve a particular output. Because this protocol is both experimentally and computationally efficient, it is readily extensible to large systems. For this paper, we demonstrate both the bench- marking and device control protocol components of CODA through examples of realistic simulations of electrostatic quantum dot devices, which are currently being developed experimentally for quantum computation.
- Research Organization:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Univ. of Wisconsin, Madison, WI (United States)
- Sponsoring Organization:
- USDOE National Nuclear Security Administration (NNSA)
- DOE Contract Number:
- AC04-94AL85000; W911NF-12-1-0607; W911NF-17-1-0274; PHY-1104660; NA0003525
- OSTI ID:
- 1426899
- Report Number(s):
- SAND2014-17451J; 537339
- Resource Relation:
- Conference: APS March Meeting 2018, Session F28: Architectures for Semiconducting Quantum Computing, Los Angeles, CA (United States), 5-9 March 2018
- Country of Publication:
- United States
- Language:
- English
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