Resist design methodology: Past, present, future
- AT&T Bell Labs., Murray Hill, NJ (United States)
Soon after the invention of the point contact transistor in 1947, the planer junction transistor was developed. This technology required etching precise patterns into dielectric and conductor films on flat semiconductor substrates with dimensions a small as 35{mu}m. This was accomplished by utilizing a polymer resist and a very old art process that was used to etch glass and metal for decorative purposes. The same process was used to produce copper printing plates. By 1970 the monolithic integrated circuit (IC`s) had been developed and their manufacture required producing features as small as 10 {mu}m and by 1980 2{mu}m patterns were common place. In the year 2000 the authors will be manufacturing circuits with geometries of 0.15{mu}m dimensions. This phenomenal evolution has required and continues to require polymer resist materials of ever increasing sophistication. This paper will describe the evolution of the lithography technology used to produce these circuits and the resist design methods developed at AT&T Bell Laboratories. A lithography roadmap will be presented and polymer resist needs discussed.
- OSTI ID:
- 141820
- Report Number(s):
- CONF-930304--
- Country of Publication:
- United States
- Language:
- English
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