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U.S. Department of Energy
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Integratible Process for Fabrication of Fluidic Microduct Networks on a Single Wafer

Conference ·
OSTI ID:13994

We present a microelectronics fabrication compatible process that comprises photolithography and a key room temperature SiON thin film plasma deposition to define and seal a fluidic microduct network. Our single wafer process is independent of thermo-mechanical material properties, particulate cleaning, global flatness, assembly alignment, and glue medium application, which are crucial for wafer fusion bonding or sealing techniques using a glue medium. From our preliminary experiments, we have identified a processing window to fabricate channels on silicon, glass and quartz substrates. Channels with a radius of curvature between 8 and 50 {micro}m, are uniform along channel lengths of several inches and repeatable across the wafer surfaces. To further develop this technology, we have begun characterizing the SiON film properties such as elastic modulus using nanoindentation, and chemical bonding compatibility with other microelectronic materials.

Research Organization:
Sandia National Labs., Albuquerque, NM (US); Sandia National Labs., Livermore, CA (US)
Sponsoring Organization:
US Department of Energy (US)
DOE Contract Number:
AC04-94AL85000
OSTI ID:
13994
Report Number(s):
SAND99-2323C
Country of Publication:
United States
Language:
English