Integratible Process for Fabrication of Fluidic Microduct Networks on a Single Wafer
We present a microelectronics fabrication compatible process that comprises photolithography and a key room temperature SiON thin film plasma deposition to define and seal a fluidic microduct network. Our single wafer process is independent of thermo-mechanical material properties, particulate cleaning, global flatness, assembly alignment, and glue medium application, which are crucial for wafer fusion bonding or sealing techniques using a glue medium. From our preliminary experiments, we have identified a processing window to fabricate channels on silicon, glass and quartz substrates. Channels with a radius of curvature between 8 and 50 {micro}m, are uniform along channel lengths of several inches and repeatable across the wafer surfaces. To further develop this technology, we have begun characterizing the SiON film properties such as elastic modulus using nanoindentation, and chemical bonding compatibility with other microelectronic materials.
- Research Organization:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Sandia National Lab. (SNL-CA), Livermore, CA (United States)
- Sponsoring Organization:
- US Department of Energy (US)
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 13994
- Report Number(s):
- SAND99-2323C; TRN: AH200114%%272
- Resource Relation:
- Conference: SPIE Microelectronics-Micromachining 1999, Santa Clara, CA (US), 09/20/1999--09/22/1999; Other Information: PBD: 7 Sep 1999
- Country of Publication:
- United States
- Language:
- English
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