Extending the Constrained Random Simulation Methodology into Physical Device Verification of an Embedded Processor ASIC.
Conference
·
OSTI ID:1346117
Abstract not provided.
- Research Organization:
- Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE National Nuclear Security Administration (NNSA)
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 1346117
- Report Number(s):
- SAND2016-1856C; 619637
- Country of Publication:
- United States
- Language:
- English
Similar Records
Extending the constrained random simulation methodology into physical device verification for Processor-based ASICs.
Formal Verification of Digital ASICs.
Improving ASIC Reuse with Embedded FPGA Fabrics.
Conference
·
Mon Feb 29 23:00:00 EST 2016
·
OSTI ID:1422153
Formal Verification of Digital ASICs.
Conference
·
Mon Feb 29 23:00:00 EST 2016
·
OSTI ID:1346887
Improving ASIC Reuse with Embedded FPGA Fabrics.
Conference
·
Mon Nov 30 23:00:00 EST 2015
·
OSTI ID:1339057