High voltage semiconductor devices and methods of making the devices
Patent
·
OSTI ID:1345218
A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.
- Research Organization:
- MONOLITH SEMICONDUCTOR INC. Round Rock, TX (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AR0000442
- Assignee:
- MONOLITH SEMICONDUCTOR INC.
- Patent Number(s):
- 9,583,482
- Application Number:
- 14/619,742
- OSTI ID:
- 1345218
- Country of Publication:
- United States
- Language:
- English
Improvement of the electrical safe operating area of a DMOS transistor during ESD events
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conference | April 2009 |
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