Using benchmarks for radiation testing of microprocessors and FPGAs
- Los Alamos National Lab. (LANL), Los Alamos, NM (United States)
- Vanderbilt Univ., Nashville, TN (United States)
- Univ. Federal do Rio Grande do Sul, Porto Alegre (Brasil)
- Univ. de Sevilla, Sevilla (Spain)
- Stellenbosch Univ., Stellenbosch (South Africa)
- Politecnico di Torino, Torino (Italy)
- Univ. Carlos III de Madrid, Madrid (Spain)
- California Institute of Technology, Pasadena, CA (United States)
- Northeastern Univ., Boston, MA (United States)
- Brigham Young Univ., Provo, UT (United States)
Performance benchmarks have been used over the years to compare different systems. These benchmarks can be useful for researchers trying to determine how changes to the technology, architecture, or compiler affect the system's performance. No such standard exists for systems deployed into high radiation environments, making it difficult to assess whether changes in the fabrication process, circuitry, architecture, or software affect reliability or radiation sensitivity. In this paper, we propose a benchmark suite for high-reliability systems that is designed for field-programmable gate arrays and microprocessors. As a result, we describe the development process and report neutron test data for the hardware and software benchmarks.
- Research Organization:
- Los Alamos National Lab. (LANL), Los Alamos, NM (United States)
- Sponsoring Organization:
- USDOE
- Grant/Contract Number:
- AC52-06NA25396
- OSTI ID:
- 1312569
- Alternate ID(s):
- OSTI ID: 1356128
- Report Number(s):
- LA-UR--15-24958
- Journal Information:
- IEEE Transactions on Nuclear Science, Journal Name: IEEE Transactions on Nuclear Science Journal Issue: 6 Vol. 62; ISSN 0018-9499
- Publisher:
- Institute of Electrical and Electronics Engineers (IEEE)Copyright Statement
- Country of Publication:
- United States
- Language:
- English
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