The Power-Performance Tradeoffs of the Intel Xeon Phi on HPC Applications

Conference · Fri May 23 04:00:00 EDT 2014

DOI:https://doi.org/10.1109/IPDPSW.2014.162· OSTI ID:1178876

Li, Bo; Chang, Hung-Ching; Song, Shuaiwen; Su, Chun-Yi; Meyer, Timothy; Mooring, John; Cameron, Kirk

Accelerators are used in about 13% of the current Top500 List. Supercomputers leveraging accelerators grew by a factor of 2.2x in 2012 and are expected to completely dominate the Top500 by 2015. Though most of these deployments use NVIDIA GPGPU accelerators, Intel’s Xeon Phi architecture will likely grow in popularity in the coming years. Unfortunately, there are few studies analyzing the performance and energy efficiency of systems leveraging the Intel Xeon Phi. We extend our systemic measurement methodology to isolate system power by component including accelerators. We use this methodology to present a detailed study of the performance-energy tradeoffs of the Xeon Phi architecture.

• Research Organization: Pacific Northwest National Laboratory (PNNL), Richland, WA (US)
• Sponsoring Organization: USDOE
• DOE Contract Number: AC05-76RL01830
• OSTI ID: 1178876
• Report Number(s): PNNL-SA-105671; KJ0402000
• Country of Publication: United States
• Language: English