HPC Programming on Intel Many-Integrated-Core Hardware with MAGMA Port to Xeon Phi

Dongarra, Jack; Gates, Mark; Haidar, Azzam; Jia, Yulu; Kabir, Khairul; Luszczek, Piotr; Tomov, Stanimire

doi:10.1155/2015/502593

HPC Programming on Intel Many-Integrated-Core Hardware with MAGMA Port to Xeon Phi

Journal Article · Wed Dec 31 23:00:00 EST 2014 · Scientific Programming

DOI:https://doi.org/10.1155/2015/502593· OSTI ID:1361290

Dongarra, Jack ^[1]; Gates, Mark ^[2]; Haidar, Azzam ^[2]; Jia, Yulu ^[2]; Kabir, Khairul ^[2]; Luszczek, Piotr ^[2]; Tomov, Stanimire ^[2]

Univ. of Tennessee, Knoxville, TN (United States); Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Univ. of Manchester (United Kingdom)
Univ. of Tennessee, Knoxville, TN (United States)

This paper presents the design and implementation of several fundamental dense linear algebra (DLA) algorithms for multicore with Intel Xeon Phi coprocessors. In particular, we consider algorithms for solving linear systems. Further, we give an overview of the MAGMA MIC library, an open source, high performance library, that incorporates the developments presented here and, more broadly, provides the DLA functionality equivalent to that of the popular LAPACK library while targeting heterogeneous architectures that feature a mix of multicore CPUs and coprocessors. The LAPACK-compliance simplifies the use of the MAGMA MIC library in applications, while providing them with portably performant DLA. High performance is obtained through the use of the high-performance BLAS, hardware-specific tuning, and a hybridization methodology whereby we split the algorithm into computational tasks of various granularities. Execution of those tasks is properly scheduled over the heterogeneous hardware by minimizing data movements and mapping algorithmic requirements to the architectural strengths of the various heterogeneous hardware components. Our methodology and programming techniques are incorporated into the MAGMA MIC API, which abstracts the application developer from the specifics of the Xeon Phi architecture and is therefore applicable to algorithms beyond the scope of DLA.

Research Organization:: Univ. of Tennessee, Knoxville, TN (United States); Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)

Sponsoring Organization:: USDOE; National Science Foundation (NSF) (United States); Intel Science and Technology Center (ISTC) for Big Data (United States); Russian Scientific Fund (Russian Federation)

Contributing Organization:: Univ. of Manchester (United Kingdom)

Grant/Contract Number:: AC05-00OR22725

OSTI ID:: 1361290

Journal Information:: Scientific Programming, Journal Name: Scientific Programming Vol. 2015; ISSN 1058-9244

Publisher:: HindawiCopyright Statement

Country of Publication:: United States

Language:: English

References (8)

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Cited By (3)

Solving dense symmetric indefinite systems using GPUs Baboulin, Marc; Dongarra, Jack; Rémy, Adrien Concurrency and Computation: Practice and Experience, Vol. 29, Issue 9 https://doi.org/10.1002/cpe.4055	journal	March 2017
Stream Processing on Hybrid CPU/Intel® Xeon Phi™ Systems Ferrão, Paulo; Marques, Hélder; Paulino, Hervé Euro-Par 2018: Parallel Processing https://doi.org/10.1007/978-3-319-96983-1_56	book	January 2018
Toward a BLAS library truly portable across different accelerator types Rodriguez-Gutiez, Eduardo; Moreton-Fernandez, Ana; Gonzalez-Escribano, Arturo The Journal of Supercomputing, Vol. 75, Issue 11 https://doi.org/10.1007/s11227-019-02925-3	journal	June 2019

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