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Title: Electrical latching of microelectromechanical devices

Abstract

Methods are disclosed for row and column addressing of an array of microelectromechanical (MEM) devices. The methods of the present invention are applicable to MEM micromirrors or memory elements and allow the MEM array to be programmed and maintained latched in a programmed state with a voltage that is generally lower than the voltage required for electrostatically switching the MEM devices.

Inventors:
;
Publication Date:
Research Org.:
Sandia National Lab. (SNL-CA), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1175117
Patent Number(s):
6,813,060
Application Number:
10/316,172
Assignee:
Sandia Corporation SNL-L
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING

Citation Formats

Garcia, Ernest J., and Sleefe, Gerard E. Electrical latching of microelectromechanical devices. United States: N. p., 2004. Web.
Garcia, Ernest J., & Sleefe, Gerard E. Electrical latching of microelectromechanical devices. United States.
Garcia, Ernest J., and Sleefe, Gerard E. Tue . "Electrical latching of microelectromechanical devices". United States. https://www.osti.gov/servlets/purl/1175117.
@article{osti_1175117,
title = {Electrical latching of microelectromechanical devices},
author = {Garcia, Ernest J. and Sleefe, Gerard E.},
abstractNote = {Methods are disclosed for row and column addressing of an array of microelectromechanical (MEM) devices. The methods of the present invention are applicable to MEM micromirrors or memory elements and allow the MEM array to be programmed and maintained latched in a programmed state with a voltage that is generally lower than the voltage required for electrostatically switching the MEM devices.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2004},
month = {11}
}

Patent:

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