Evict on write, a management strategy for a prefetch unit and/or first level cache in a multiprocessor system with speculative execution
Patent
·
OSTI ID:1158923
In a multiprocessor system with at least two levels of cache, a speculative thread may run on a core processor in parallel with other threads. When the thread seeks to do a write to main memory, this access is to be written through the first level cache to the second level cache. After the write though, the corresponding line is deleted from the first level cache and/or prefetch unit, so that any further accesses to the same location in main memory have to be retrieved from the second level cache. The second level cache keeps track of multiple versions of data, where more than one speculative thread is running in parallel, while the first level cache does not have any of the versions during speculation. A switch allows choosing between modes of operation of a speculation blind first level cache.
- Research Organization:
- International Business Machines Corporation, Armonk, NY (United States)
- Sponsoring Organization:
- USDOE
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Number(s):
- 8,838,906
- Application Number:
- 12/984,308
- OSTI ID:
- 1158923
- Country of Publication:
- United States
- Language:
- English
Bulk Disambiguation of Speculative Threads in Multiprocessors
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conference | January 2006 |
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