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Lattice matched semiconductor growth on crystalline metallic substrates

Patent ·
OSTI ID:1107805
Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.
Research Organization:
National Renewable Energy Laboratory (NREL), Golden, CO (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC36-08GO28308;
Assignee:
Alliance for Sustainable Energy, LLC (Golden, CO)
Patent Number(s):
8,575,471
Application Number:
12/551,397
OSTI ID:
1107805
Country of Publication:
United States
Language:
English

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