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Title: Methods for fabrication of positional and compositionally controlled nanostructures on substrate

Patent ·
OSTI ID:1087891

Fabrication methods disclosed herein provide for a nanoscale structure or a pattern comprising a plurality of nanostructures of specific predetermined position, shape and composition, including nanostructure arrays having large area at high throughput necessary for industrial production. The resultant nanostracture patterns are useful for nanostructure arrays, specifically sensor and catalytic arrays.

Research Organization:
Univ. of California, Oakland, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC03-76SF00098
Assignee:
The Regents of the University of California (Oakland, CA)
Patent Number(s):
8,486,287
Application Number:
10/599,106
OSTI ID:
1087891
Country of Publication:
United States
Language:
English

References (48)

Directed Assembly of One-Dimensional Nanostructures into Functional Networks journal January 2001
Direct Ultrasensitive Electrical Detection of DNA and DNA Sequence Variations Using Nanowire Nanosensors journal January 2004
Submicron patterning without using submicron lithographic technique patent November 1982
Fabrication of large area 100 nm pitch grating by spatial frequency doubling and nanoimprint lithography for subwavelength optical applications
  • Yu, Zhaoning; Wu, Wei; Chen, Lei
  • Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, Vol. 19, Issue 6 https://doi.org/10.1116/1.1409384
journal January 2001
Modeling and characterization of sacrificial polysilicon etching using vapor-phase xenon difluoride conference January 2004
The etching of silicon with XeF 2 vapor journal January 1979
Spacer process for on pitch contacts and related structures patent June 2010
Methods for forming arrays of small, closely spaced features patent August 2009
Masking techniques and contact imprint reticles for dense semiconductor fabrication patent September 2010
Multicomponent nanorods patent-application April 2007
Ultrahigh-Density Nanowire Lattices and Circuits journal March 2003
Semiconductor device and method for fabricating the same patent March 2001
Germanium Nanowire Growth via Simple Vapor Transport journal March 2000
Semiconductor device and a method of manufacturing the same patent October 2002
Masking process for simultaneously patterning separate regions patent November 2010
Method for forming a semiconductor device patent March 2002
Vertical MOSFET with asymmetric gate structure patent February 2004
Innovative narrow gate formation for floating gate flash technology patent June 2003
Nanowire Nanosensors for Highly Sensitive and Selective Detection of Biological and Chemical Species journal August 2001
Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture patent July 2002
Application of ≊100 Å linewidth structures fabricated by shadowing techniques journal November 1981
Diameter-controlled synthesis of single-crystal silicon nanowires journal April 2001
Method for forming a hard mask of half critical dimension patent August 2000
Implantation into high-K dielectric material after gate etch to facilitate removal patent July 2004
Large-Scale Hierarchical Organization of Nanowire Arrays for Integrated Nanosystems journal September 2003
Doping and Electrical Transport in Silicon Nanowires journal June 2000
Sensitivity control for nanotube sensors patent May 2005
Ultraviolet grating polarizers journal November 1981
Spacer FinFET: nanoscale double-gate CMOS technology for the terabit era journal October 2002
Structure with a silicon body having through openings patent July 1983
Method of forming pitch multipled contacts patent November 2010
Electron beam lithography method forming nanocrystal shadowmasks and nanometer etch masks patent August 2002
Self-aligned field effect transistor process patent December 1983
Generation of surface gratings with periods < 1000 Å journal April 1981
Silicon-on-insulator biosensor device patent March 2005
Indium phosphide nanowires as building blocks for nanoscale electronic and optoelectronic devices journal January 2001
Large area 50nm period grating by multiple nanoimprint lithography and spatial frequency doubling journal January 2007
Reducing pitch with continuously adjustable line and space dimensions patent August 1998
Process for fabricating a DRAM array having feature widths that transcend the resolution limit of available photolithography patent May 1991
Planar nanowire based sensor elements, devices, systems and methods for using and making same patent-application July 2004
Process for improving critical dimension uniformity of integrated circuit arrays patent February 2009
Fabrication of deep submicron structures and quantum wire transistors using hard-mask transistor width definition patent May 2000
Functional Nanoscale Electronic Devices Assembled Using Silicon Nanowire Building Blocks journal February 2001
Fabrication process of sub-micrometer channel length MOSFETs patent December 1983
Multicomponent nanorods patent September 2008
Method of producing high resolution and reproducible patterns patent August 1992
Method of making structures with dimensions in the sub-micrometer range patent March 1985
Generation of <50 nm period gratings using edge defined techniques journal January 1983