D0 Silicon Upgrade: Cable Power Dissipation in the D0 Silicon Tracker
Readout cables extend from the ladder end to the outer barrel radius in the region where the F-disks are mounted. In this region it is difficult to know what the gas temperature will be due to the power dissipating components on the F-disks and power from all the cables. This region is convectively cooled by the barrel bulkhead and the F-disk cooling channel. Power dissipated in the cable will not only warm the surrounding gas but will warm the hybrid to which it is attached on the ladders and disks. Just how much power goes into the hybrid will be estimated here. Physically, the cable is composed of two layers of copper which are separated and encased by 3 layers of kapton. The central kapton layer is 0.001-inch thick, the outer two kapton layers are 0.0005-inch thick, and the two copper layers are 0.0006-inch thick. Mike Matulik estimated the power dissipation of the cables for the 3. 6, and 9 chip ladders. These estimates are based on the assumed cross-sectional area of copper in the cable and the current these cables will carry, for a 12-inch cable length. The assumed powers are 14, 49, and 114 mW, respectively. The cable power dissipation is modeled using the finite difference technique. To determine the allowable node size for this simulation a 5-inch cable was simulated, with the same cross-sectional area and nominal power dissipation approximately equal to the power dissipated in the 6 chip ladder cable. Node sizes of 25, 50, and 100 mils are considered. Considering Figures 1 and 2,100 mil nodes will be used for future simulations, considered adequately small to simulate the cable.
- Research Organization:
- Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC)
- DOE Contract Number:
- AC02-07CH11359
- OSTI ID:
- 1033283
- Report Number(s):
- FERMILAB-D0-EN-448; TRN: US1200360
- Country of Publication:
- United States
- Language:
- English
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