Case history: Failure analysis of a 16K ROM with a polysilicon gate defect
This case history presents the analysis of a very unusual CMOS 2K {times} 8 read only memory (ROM) failure. The IC failure was discovered after a 1,000 hour, 150{degree}C static life test. Elevated quiescent power supply current was present that caused the IC to fail parametric testing, but the IC was fully functional at the specified operating power supply voltage of 10 V. Functional failures were ``forced`` by operating the IC at below nominal voltage. Electron beam probing and dynamic voltage contrast imaging performed while the IC was in the functional failing mode indicated the presence of an electrical open circuit in the polysilicon gate interconnect of a p-channel transistor. The IC was deprocessed down to the polysilicon and the defective gate was examined with a scanning electron microscope. An abrupt change in microstructure was observed at the location corresponding to the site of electrical discontinuity. Circuit simulations, performed using a series gate resistance to model the defective gate, showed that the gate signal to the p-channel transistor changed phase and high current was present if the gate resistance exceeded 1 {times} 10{sup 9} ohms. The change in microstructure and increased gate resistance are consistent with a localized reduction of dopant (phosphorus) concentration. During the life test, it is speculated that phosphorus segregated to the grain boundaries resulting in a net reduction of dopant atoms and a corresponding decrease in the conductivity of the polysilicon gate. This IC failure is apparently due to dopant segregation and carrier trapping at the grain boundaries in the polysilicon during the high temperature life test.
- Research Organization:
- Sandia National Labs., Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE, Washington, DC (United States)
- DOE Contract Number:
- AC04-76DP00789
- OSTI ID:
- 10183291
- Report Number(s):
- SAND-93-0385C; CONF-931191-2; ON: DE93019420; TRN: AHC29312%%15
- Resource Relation:
- Conference: ISTFA `93: 19th international symposium for testing and failure analysis,Los Angeles, CA (United States),15-19 Nov 1993; Other Information: PBD: [1993]
- Country of Publication:
- United States
- Language:
- English
Similar Records
Design principles for high efficiency small-grain polysilicon solar cells, with supporting experimental studies
Modeling of lateral p-n junction diodes in polysilicon films