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System and method for programmable bank selection for banked memory subsystems

Patent ·
OSTI ID:1017170
 [1];  [2];  [3];  [4];  [5];  [6];  [7];  [8]
  1. Ridgefield, CT
  2. Croton on Hudson, NY
  3. Mount Kisco, NY
  4. Irvington, NY
  5. Seebruck-Seeon, DE
  6. Yorktown Heights, NY
  7. Chappaqua, NY
  8. Mahopac, NY
+ Show Author Affiliations
A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.
Research Organization:
International Business Machines Corporation (Armonk, NY)
Sponsoring Organization:
USDOE
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Number(s):
7,793,038
Application Number:
11/768,805
OSTI ID:
1017170
Country of Publication:
United States
Language:
English

References (8)

Overview of the Blue Gene/L system architecture journal March 2005
Performance evaluation of adaptive MPI
  • Huang, Chao; Zheng, Gengbin; Kalé, Laxmikant
  • Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming - PPoPP '06 https://doi.org/10.1145/1122971.1122976
conference January 2006
Synchronization, coherence, and event ordering in multiprocessors journal February 1988
Blue Gene/L advanced diagnostics environment journal March 2005
Optimization of MPI collective communication on BlueGene/L systems conference January 2005
Intel 870: a building block for cost-effective, scalable servers journal March 2002
Directory-based cache coherence in large-scale multiprocessors journal June 1990
Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures journal August 2005

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