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Title: Silicon on insulator achieved using electrochemical etching

Abstract

Bulk crystalline silicon wafers are transferred after the completion of circuit fabrication to form thin films of crystalline circuitry on almost any support, such as metal, semiconductor, plastic, polymer, glass, wood, and paper. In particular, this technique is suitable to form silicon-on-insulator (SOI) wafers, whereby the devices and circuits formed exhibit superior performance after transfer due to the removal of the silicon substrate. The added cost of the transfer process to conventional silicon fabrication is insignificant. No epitaxial, lift-off, release or buried oxide layers are needed to perform the transfer of single or multiple wafers onto support members. The transfer process may be performed at temperatures of 50.degree. C. or less, permits transparency around the circuits and does not require post-transfer patterning. Consequently, the technique opens up new avenues for the use of integrated circuit devices in high-brightness, high-resolution video-speed color displays, reduced-thickness increased-flexibility intelligent cards, flexible electronics on ultrathin support members, adhesive electronics, touch screen electronics, items requiring low weight materials, smart cards, intelligent keys for encryption systems, toys, large area circuits, flexible supports, and other applications. The added process flexibility also permits a cheap technique for increasing circuit speed of market driven technologies such as microprocessors at littlemore » added expense.

Inventors:
 [1]
  1. Menlo Park, CA
Issue Date:
Research Org.:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
OSTI Identifier:
871172
Patent Number(s):
5674758
Assignee:
Regents of University of California (Oakland, CA)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC Y10S - TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
DOE Contract Number:  
W-7405-ENG-48
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
silicon; insulator; achieved; electrochemical; etching; bulk; crystalline; wafers; transferred; completion; circuit; fabrication; form; films; circuitry; support; metal; semiconductor; plastic; polymer; glass; wood; paper; particular; technique; suitable; silicon-on-insulator; soi; whereby; devices; circuits; formed; exhibit; superior; performance; transfer; due; removal; substrate; added; cost; process; conventional; insignificant; epitaxial; lift-off; release; buried; oxide; layers; perform; single; multiple; performed; temperatures; 50; degree; permits; transparency; require; post-transfer; patterning; consequently; avenues; integrated; high-brightness; high-resolution; video-speed; color; displays; reduced-thickness; increased-flexibility; intelligent; cards; flexible; electronics; ultrathin; adhesive; touch; screen; items; requiring; weight; materials; smart; keys; encryption; systems; toys; supports; applications; flexibility; cheap; increasing; speed; market; driven; technologies; microprocessors; expense; buried oxide; circuit fabrication; oxide layers; electrochemical etching; chemical etching; silicon substrate; integrated circuit; oxide layer; silicon wafer; crystalline silicon; silicon wafers; multiple wafers; circuit device; transfer process; circuit devices; flexible support; weight material; form silicon; flexible supports; weight materials; conventional silicon; /438/148/205/

Citation Formats

McCarthy, Anthony M. Silicon on insulator achieved using electrochemical etching. United States: N. p., 1997. Web.
McCarthy, Anthony M. Silicon on insulator achieved using electrochemical etching. United States.
McCarthy, Anthony M. Wed . "Silicon on insulator achieved using electrochemical etching". United States. https://www.osti.gov/servlets/purl/871172.
@article{osti_871172,
title = {Silicon on insulator achieved using electrochemical etching},
author = {McCarthy, Anthony M},
abstractNote = {Bulk crystalline silicon wafers are transferred after the completion of circuit fabrication to form thin films of crystalline circuitry on almost any support, such as metal, semiconductor, plastic, polymer, glass, wood, and paper. In particular, this technique is suitable to form silicon-on-insulator (SOI) wafers, whereby the devices and circuits formed exhibit superior performance after transfer due to the removal of the silicon substrate. The added cost of the transfer process to conventional silicon fabrication is insignificant. No epitaxial, lift-off, release or buried oxide layers are needed to perform the transfer of single or multiple wafers onto support members. The transfer process may be performed at temperatures of 50.degree. C. or less, permits transparency around the circuits and does not require post-transfer patterning. Consequently, the technique opens up new avenues for the use of integrated circuit devices in high-brightness, high-resolution video-speed color displays, reduced-thickness increased-flexibility intelligent cards, flexible electronics on ultrathin support members, adhesive electronics, touch screen electronics, items requiring low weight materials, smart cards, intelligent keys for encryption systems, toys, large area circuits, flexible supports, and other applications. The added process flexibility also permits a cheap technique for increasing circuit speed of market driven technologies such as microprocessors at little added expense.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Wed Jan 01 00:00:00 EST 1997},
month = {Wed Jan 01 00:00:00 EST 1997}
}

Works referenced in this record:

Vertically structured silicon membrane by electrochemical etching
journal, April 1990


Bonding of silicon wafers for silicon‐on‐insulator
journal, November 1988


Ellipsometric Study of the Etch‐Stop Mechanism in Heavily Doped Silicon
journal, January 1985


Study of electrochemical etch-stop for high-precision thickness control of silicon membranes
journal, April 1989


Wafer bonding for silicon‐on‐insulator technologies
journal, January 1986


Light-controlled, electrochemical, anisotropic etching of silicon
conference, January 1991


Thermally and electrically isolated single crystal silicon structures in CMOS technology
journal, October 1994