Method to fabricate multi-level silicon-based microstructures via use of an etching delay layer
Abstract
New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Structures having features with different depth can be formed thereby in a single etching step.
- Inventors:
- Issue Date:
- Research Org.:
- Sandia National Lab. (SNL-CA), Livermore, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1175465
- Patent Number(s):
- 6930051
- Application Number:
- 10/165,861
- Assignee:
- Sandia Corporation
- Patent Classifications (CPCs):
-
B - PERFORMING OPERATIONS B81 - MICROSTRUCTURAL TECHNOLOGY B81C - PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- AC04-94AL85000
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 77 NANOSCIENCE AND NANOTECHNOLOGY
Citation Formats
Manginell, Ronald P., Schubert, W. Kent, and Shul, Randy J. Method to fabricate multi-level silicon-based microstructures via use of an etching delay layer. United States: N. p., 2005.
Web.
Manginell, Ronald P., Schubert, W. Kent, & Shul, Randy J. Method to fabricate multi-level silicon-based microstructures via use of an etching delay layer. United States.
Manginell, Ronald P., Schubert, W. Kent, and Shul, Randy J. Tue .
"Method to fabricate multi-level silicon-based microstructures via use of an etching delay layer". United States. https://www.osti.gov/servlets/purl/1175465.
@article{osti_1175465,
title = {Method to fabricate multi-level silicon-based microstructures via use of an etching delay layer},
author = {Manginell, Ronald P. and Schubert, W. Kent and Shul, Randy J.},
abstractNote = {New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Structures having features with different depth can be formed thereby in a single etching step.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Aug 16 00:00:00 EDT 2005},
month = {Tue Aug 16 00:00:00 EDT 2005}
}
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