Cache as point of coherence in multiprocessor system
Abstract
In a multiprocessor system, a conflict checking mechanism is implemented in the L2 cache memory. Different versions of speculative writes are maintained in different ways of the cache. A record of speculative writes is maintained in the cache directory. Conflict checking occurs as part of directory lookup. Speculative versions that do not conflict are aggregated into an aggregated version in a different way of the cache. Speculative memory access requests do not go to main memory.
- Inventors:
- Issue Date:
- Research Org.:
- GLOBALFOUNDRIES INC., Grand Cayman, KY (Cayman Islands)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1333728
- Patent Number(s):
- 9507647
- Application Number:
- 13/008,531
- Assignee:
- GLOBALFOUNDRIES INC. (Grand Cayman, KY)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- B554331
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2011 Jan 18
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Blumrich, Matthias A., Ceze, Luis H., Chen, Dong, Gara, Alan, Heidelberger, Phlip, Ohmacht, Martin, Steinmacher-Burow, Burkhard, and Zhuang, Xiaotong. Cache as point of coherence in multiprocessor system. United States: N. p., 2016.
Web.
Blumrich, Matthias A., Ceze, Luis H., Chen, Dong, Gara, Alan, Heidelberger, Phlip, Ohmacht, Martin, Steinmacher-Burow, Burkhard, & Zhuang, Xiaotong. Cache as point of coherence in multiprocessor system. United States.
Blumrich, Matthias A., Ceze, Luis H., Chen, Dong, Gara, Alan, Heidelberger, Phlip, Ohmacht, Martin, Steinmacher-Burow, Burkhard, and Zhuang, Xiaotong. Tue .
"Cache as point of coherence in multiprocessor system". United States. https://www.osti.gov/servlets/purl/1333728.
@article{osti_1333728,
title = {Cache as point of coherence in multiprocessor system},
author = {Blumrich, Matthias A. and Ceze, Luis H. and Chen, Dong and Gara, Alan and Heidelberger, Phlip and Ohmacht, Martin and Steinmacher-Burow, Burkhard and Zhuang, Xiaotong},
abstractNote = {In a multiprocessor system, a conflict checking mechanism is implemented in the L2 cache memory. Different versions of speculative writes are maintained in different ways of the cache. A record of speculative writes is maintained in the cache directory. Conflict checking occurs as part of directory lookup. Speculative versions that do not conflict are aggregated into an aggregated version in a different way of the cache. Speculative memory access requests do not go to main memory.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Nov 29 00:00:00 EST 2016},
month = {Tue Nov 29 00:00:00 EST 2016}
}
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Works referenced in this record:
System for identifying memory requests as noncacheable or reduce cache coherence directory lookups and bus snoops
patent, October 2002
- Jones, Phillip M.; Lester, Robert A.
- US Patent Document 6,470,429