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Title: Light-induced voltage alteration for integrated circuit analysis

Patent ·
OSTI ID:869963

An apparatus and method are described for analyzing an integrated circuit (IC), The invention uses a focused light beam that is scanned over a surface of the IC to generate a light-induced voltage alteration (LIVA) signal for analysis of the IC, The LIVA signal may be used to generate an image of the IC showing the location of any defects in the IC; and it may be further used to image and control the logic states of the IC. The invention has uses for IC failure analysis, for the development of ICs, for production-line inspection of ICs, and for qualification of ICs.

Research Organization:
Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
DOE Contract Number:
AC04-94AL85000
Assignee:
United States of America as represented by United States (Washington, DC)
Patent Number(s):
US 5430305
OSTI ID:
869963
Country of Publication:
United States
Language:
English

References (7)

IC failure analysis: techniques and tools for quality reliability improvement journal May 1993
Logic Failure Analysis of CMOS VLSI using a Laser Probe conference April 1984
Detection and localization of gate oxide shorts in MOS transistors by optical-beam-induced current journal January 1991
Novel failure analysis techniques using photon probing with a scanning optical microscope conference January 1994
Rapid localization of IC open conductors using charge-induced voltage alteration (CIVA) conference January 1992
Imaging Latch-Up Sites in LSI CMOS with a Laser Photoscanner conference April 1983
Laser scanning of MOS IC's reveals internal logic states nondestructively journal January 1976