CoreTSAR: Core Task-Size Adapting Runtime

Journal Article · Mon Oct 27 00:00:00 EDT 2014 · IEEE Transactions on Parallel and Distributed Systems

DOI:https://doi.org/10.1109/TPDS.2014.2365192· OSTI ID:1249154

Scogland, Thomas R. W. ^[1]; Feng, Wu-chun ^[1]; Rountree, Barry ^[2]; de Supinski, Bronis R. ^[2]

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1. Virginia Polytechnic Inst. and State Univ. (Virginia Tech), Blacksburg, VA (United States). Dept. of Computer Science
2. Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States). Center for Applied Scientific Computing

Heterogeneity continues to increase at all levels of computing, with the rise of accelerators such as GPUs, FPGAs, and other co-processors into everything from desktops to supercomputers. As a consequence, efficiently managing such disparate resources has become increasingly complex. CoreTSAR seeks to reduce this complexity by adaptively worksharing parallel-loop regions across compute resources without requiring any transformation of the code within the loop. Lastly, our results show performance improvements of up to three-fold over a current state-of-the-art heterogeneous task scheduler as well as linear performance scaling from a single GPU to four GPUs for many codes. In addition, CoreTSAR demonstrates a robust ability to adapt to both a variety of workloads and underlying system configurations.

• Research Organization: Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
• Sponsoring Organization: USDOE Office of Science (SC), Advanced Scientific Computing Research (ASCR); US Air Force Office of Scientific Research (AFOSR); USDOD
• Grant/Contract Number: AC52-07NA27344; FA9550-12-1-0442
• OSTI ID: 1249154
• Report Number(s): LLNL-JRNL-662817
• Journal Information: IEEE Transactions on Parallel and Distributed Systems, Vol. 26, Issue 11; ISSN 1045-9219
• Publisher: IEEE
• Country of Publication: United States
• Language: English

Related Subjects

97 MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE