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Title: Semiconductive micro- and nano-wire array manufacturing

Patent ·
OSTI ID:1183341

The disclosure provides methods of manufacturing semiconductive structures using stamping and VLS techniques.

Research Organization:
California Institute of Technology (CalTech), Pasadena, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
FG02-05ER15754
Assignee:
California Institute of Technology (Pasadena, CA)
Patent Number(s):
9,048,097
Application Number:
13/972,809
OSTI ID:
1183341
Country of Publication:
United States
Language:
English

References (5)

Catalyst patterning for nanowire devices patent December 2004
Generic nano-imprint process for fabrication of nanowire arrays journal January 2010
Nanostructure formation via print diffusion etching through block copolymer templates journal January 2010
Fabrication nano-pillars pattern on PDMS using anodic aluminum oxide film as template conference March 2012
Hybrid Nanoimprint−Soft Lithography with Sub-15 nm Resolution journal June 2009