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Title: Ultra-low temperature (≤300 °C) growth of Ge-rich SiGe by solid-liquid-coexisting annealing of a-GeSn/c-Si structures

Ultra-low temperature (≤300 °C) growth of Ge-rich SiGe on Si substrates is strongly desired to realize advanced electronic and optical devices, which can be merged onto Si large-scale integrated circuits (LSI). To achieve this, annealing characteristics of a-GeSn/c-Si structures are investigated under wide ranges of the initial Sn concentrations (0%–26%) and annealing conditions (300–1000 °C, 1 s–48 h). Epitaxial growth triggered by SiGe mixing is observed after annealing, where the annealing temperatures necessary for epitaxial growth significantly decrease with increasing initial Sn concentration and/or annealing time. As a result, Ge-rich (∼80%) SiGe layers with Sn concentrations of ∼2% are realized by ultra-low temperature annealing (300 °C, 48 h) for a sample with the initial Sn concentration of 26%. The annealing temperature (300 °C) is in the solid-liquid coexisting temperature region of the phase diagram for Ge-Sn system. From detailed analysis of crystallization characteristics and composition profiles in grown layers, it is suggested that SiGe mixing is generated by a liquid-phase reaction even at ultra-low temperatures far below the melting temperature of a-GeSn. This ultra-low-temperature growth technique of Ge-rich SiGe on Si substrates is expected to be useful to realize next-generation LSI, where various multi-functional devices are integrated on Si substrates.
Authors:
; ;  [1] ;  [1] ;  [2]
  1. Department of Electronics, Kyushu University, 744 Motooka, Fukuoka 819-0395 (Japan)
  2. (Japan)
Publication Date:
OSTI Identifier:
22494845
Resource Type:
Journal Article
Resource Relation:
Journal Name: Journal of Applied Physics; Journal Volume: 118; Journal Issue: 9; Other Information: (c) 2015 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
36 MATERIALS SCIENCE; ABUNDANCE; ANNEALING; CRYSTAL GROWTH; CRYSTALLIZATION; EPITAXY; GERMANIUM SILICIDES; INTEGRATED CIRCUITS; MELTING POINTS; MIXING; PHASE DIAGRAMS; SILICON; SUBSTRATES; TEMPERATURE RANGE 0400-1000 K; TIN