skip to main content

SciTech ConnectSciTech Connect

Title: High-κ TiO{sub 2} thin film prepared by sol-gel spin-coating method

High-k TiO{sub 2} thin film on p-type silicon substrate was fabricated by a combined sol-gel and spin coating method. Thus deposited titania film had anatase phase with a small grain size of 16 nm and surface roughness of ≅ 0.6 nm. The oxide capacitance (C{sub ox}), flat band capacitance (C{sub FB}), flat band voltage (V{sub FB}), oxide trapped charge (Q{sub ot}), calculated from the high frequency (1 MHz) C-V curve were 0.47 nF, 0.16 nF, − 0.91 V, 4.7x10{sup −12} C, respectively. As compared to the previous reports, a high dielectric constant of 94 at 1 MHz frequency was observed in the devices investigated here and an equivalent oxide thickness (EOT) was 4.1 nm. Dispersion in accumulation capacitance shows a linear relationship with AC frequencies. Leakage current density was found in acceptable limits (2.1e-5 A/cm{sup 2} for −1 V and 5.7e-7 A/cm{sup 2} for +1 V) for CMOS applications.
Authors:
; ;  [1]
  1. Department of Physics, Indian Institute of Science, Bangalore-560012 (India)
Publication Date:
OSTI Identifier:
22490395
Resource Type:
Journal Article
Resource Relation:
Journal Name: AIP Conference Proceedings; Journal Volume: 1665; Journal Issue: 1; Conference: 59. DAE solid state physics symposium 2014, Tamilnadu (India), 16-20 Dec 2014; Other Information: (c) 2015 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY; CAPACITANCE; COMPARATIVE EVALUATIONS; GRAIN SIZE; LEAKAGE CURRENT; MHZ RANGE; PERMITTIVITY; P-TYPE CONDUCTORS; ROUGHNESS; SILICON; SOL-GEL PROCESS; SPIN-ON COATING; SUBSTRATES; SURFACES; THIN FILMS; TITANIUM OXIDES; TRAPPING