Border trap reduction in Al{sub 2}O{sub 3}/InGaAs gate stacks
- Department of Materials Science and Engineering, Stanford University, Stanford, California 94305 (United States)
- Department of Materials Science and Engineering, Technion—Israel Institute of Technology, Haifa 32000 (Israel)
- Department of Electrical Engineering, Stanford University, Stanford, California 9430 (United States)
- Department of Physics, Texas State University, San Marcos, Texas 78666 (United States)
The effect of Al{sub 2}O{sub 3} atomic layer deposition (ALD) temperature on the border trap density (N{sub bt}) of Al{sub 2}O{sub 3}/InGaAs gate stacks is investigated quantitatively, and we demonstrate that lowering the trimethylaluminum (TMA)/water vapor ALD temperature from 270 °C to 120 °C significantly reduces N{sub bt}. The reduction of N{sub bt} coincides with increased hydrogen incorporation in low temperature ALD-grown Al{sub 2}O{sub 3} films during post-gate metal forming gas annealing. It is also found that large-dose (∼6000 L) exposure of the In{sub 0.53}Ga{sub 0.47}As (100) surface to TMA immediately after thermal desorption of a protective As{sub 2} capping layer is an important step to guarantee the uniformity and reproducibility of high quality Al{sub 2}O{sub 3}/InGaAs samples made at low ALD temperatures.
- OSTI ID:
- 22486090
- Journal Information:
- Applied Physics Letters, Vol. 107, Issue 20; Other Information: (c) 2015 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
- Country of Publication:
- United States
- Language:
- English
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