Evolution of interfacial Fermi level in In{sub 0.53}Ga{sub 0.47}As/high-κ/TiN gate stacks
- IBM T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (United States)
The net charge state was probed of metal-oxide-semiconductor gate stacks consisting of In{sub 0.53}Ga{sub 0.47}As /high-κ dielectric/5 nm TiN, for both Al{sub 2}O{sub 3} and HfO{sub 2} dielectrics, via investigation of band bending at the InGaAs/high-κ interface. Using pump-probe photoelectron spectroscopy, changes to band bending were studied for each sequential layer deposited onto the InGaAs substrate and subsequent annealing up to 600 °C. Two behavioral regions were observed in annealing studies: (1) a lower temperature (<350 °C) region, attributed to changes at the high-κ/TiN interface, and (2) a higher temperature region (> 350 °C), associated with a net positive charge increase within the oxide. These band bending measurements delineate the impact of processing steps inherently inaccessible via capacitance-voltage electrical characterization.
- OSTI ID:
- 22483146
- Journal Information:
- Applied Physics Letters, Vol. 107, Issue 1; Other Information: (c) 2015 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
- Country of Publication:
- United States
- Language:
- English
Similar Records
Passivation of In{sub 0.53}Ga{sub 0.47}As/ZrO{sub 2} interfaces by AlN atomic layer deposition process
Low interfacial trap density and sub-nm equivalent oxide thickness in In{sub 0.53}Ga{sub 0.47}As (001) metal-oxide-semiconductor devices using molecular beam deposited HfO{sub 2}/Al{sub 2}O{sub 3} as gate dielectrics
Related Subjects
SUPERCONDUCTIVITY AND SUPERFLUIDITY
71 CLASSICAL AND QUANTUM MECHANICS
GENERAL PHYSICS
ALUMINIUM OXIDES
ANNEALING
CAPACITANCE
CHARGE STATES
DIELECTRIC MATERIALS
ELECTRIC POTENTIAL
FERMI LEVEL
GALLIUM ARSENIDES
HAFNIUM OXIDES
INDIUM ARSENIDES
PHOTOELECTRON SPECTROSCOPY
SEMICONDUCTOR MATERIALS
SUBSTRATES
TEMPERATURE RANGE 0400-1000 K
TITANIUM NITRIDES