skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Design and Evaluation of a Clock Multiplexing Circuit for the SSRL Booster Accelerator Timing System - Final Paper

Technical Report ·
DOI:https://doi.org/10.2172/1213210· OSTI ID:1213210
 [1]
  1. SLAC National Accelerator Lab., Menlo Park, CA (United States)

SPEAR3 is a 234 m circular storage ring at SLAC’s synchrotron radiation facility (SSRL) in which a 3 GeV electron beam is stored for user access. Typically the electron beam decays with a time constant of approximately 10hr due to electron lose. In order to replenish the lost electrons, a booster synchrotron is used to accelerate fresh electrons up to 3GeV for injection into SPEAR3. In order to maintain a constant electron beam current of 500mA, the injection process occurs at 5 minute intervals. At these times the booster synchrotron accelerates electrons for injection at a 10Hz rate. A 10Hz 'injection ready' clock pulse train is generated when the booster synchrotron is operating. Between injection intervals-where the booster is not running and hence the 10 Hz ‘injection ready’ signal is not present-a 10Hz clock is derived from the power line supplied by Pacific Gas and Electric (PG&E) to keep track of the injection timing. For this project I constructed a multiplexing circuit to 'switch' between the booster synchrotron 'injection ready' clock signal and PG&E based clock signal. The circuit uses digital IC components and is capable of making glitch-free transitions between the two clocks. This report details construction of a prototype multiplexing circuit including test results and suggests improvement opportunities for the final design.

Research Organization:
SLAC National Accelerator Lab., Menlo Park, CA (United States)
Sponsoring Organization:
USDOE Office of Science (SC)
DOE Contract Number:
AC02-76SF00515
OSTI ID:
1213210
Report Number(s):
SLAC-TN-15-018
Resource Relation:
Conference: Boston, MA (United States), 19-23 Jul 2015
Country of Publication:
United States
Language:
English

Similar Records

Design and Evaluation of a Clock Multiplexing Circuit for the SSRL Booster Accelerator Timing System - Oral Presentation
Technical Report · Tue Aug 25 00:00:00 EDT 2015 · OSTI ID:1213210

Multiplexer System for the SPEAR3 Booster BPM Upgrade
Journal Article · Tue Sep 14 00:00:00 EDT 2021 · Proceedings of the International Beam Instrumentation Conference (IBIC) · OSTI ID:1213210

Commissioning and Early Operation for the NSLS-II Booster RF System
Conference · Sun May 03 00:00:00 EDT 2015 · OSTI ID:1213210

Related Subjects