Sustaining Moore's law with 3D chips
Abstract
Here, rather than continue the expensive and time-consuming quest for transistor replacement, the authors argue that 3D chips coupled with new computer architectures can keep Moore's law on its traditional scaling path.
- Authors:
-
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Qualcomm, San Diego, CA (United States)
- Semiconductor Research Corp. (SRC), Durham, NC (United States)
- Georgia Inst. of Technology, Atlanta, GA (United States)
- International Roadmap for Devices and Systems
- Publication Date:
- Research Org.:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Org.:
- USDOE National Nuclear Security Administration (NNSA)
- OSTI Identifier:
- 1389592
- Report Number(s):
- SAND-2017-9177J
Journal ID: ISSN 0018-9162; 656561
- Grant/Contract Number:
- AC04-94AL85000
- Resource Type:
- Accepted Manuscript
- Journal Name:
- Computer
- Additional Journal Information:
- Journal Volume: 50; Journal Issue: 8; Journal ID: ISSN 0018-9162
- Publisher:
- IEEE
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING; rebooting computing; history of computing; Moore’s law; 3D chip manufacturing; chip stacking; monolithic 3D; neural network; machine learning; International Roadmap for Devices and Systems; IRDS
Citation Formats
DeBenedictis, Erik P., Badaroglu, Mustafa, Chen, An, Conte, Thomas M., and Gargini, Paolo. Sustaining Moore's law with 3D chips. United States: N. p., 2017.
Web. doi:10.1109/mc.2017.3001236.
DeBenedictis, Erik P., Badaroglu, Mustafa, Chen, An, Conte, Thomas M., & Gargini, Paolo. Sustaining Moore's law with 3D chips. United States. https://doi.org/10.1109/mc.2017.3001236
DeBenedictis, Erik P., Badaroglu, Mustafa, Chen, An, Conte, Thomas M., and Gargini, Paolo. Tue .
"Sustaining Moore's law with 3D chips". United States. https://doi.org/10.1109/mc.2017.3001236. https://www.osti.gov/servlets/purl/1389592.
@article{osti_1389592,
title = {Sustaining Moore's law with 3D chips},
author = {DeBenedictis, Erik P. and Badaroglu, Mustafa and Chen, An and Conte, Thomas M. and Gargini, Paolo},
abstractNote = {Here, rather than continue the expensive and time-consuming quest for transistor replacement, the authors argue that 3D chips coupled with new computer architectures can keep Moore's law on its traditional scaling path.},
doi = {10.1109/mc.2017.3001236},
journal = {Computer},
number = 8,
volume = 50,
place = {United States},
year = {2017},
month = {8}
}
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Works referencing / citing this record:
Micro/Nanoscale 3D Assembly by Rolling, Folding, Curving, and Buckling Approaches
journal, June 2019
- Cheng, Xu; Zhang, Yihui
- Advanced Materials, Vol. 31, Issue 36
Ultra-thin chips for high-performance flexible electronics
journal, March 2018
- Gupta, Shoubhik; Navaraj, William Taube; Lorenzelli, Leandro
- npj Flexible Electronics, Vol. 2, Issue 1
Metrology for the next generation of semiconductor devices
journal, October 2018
- Orji, N. G.; Badaroglu, M.; Barnes, B. M.
- Nature Electronics, Vol. 1, Issue 10