High-performance parallel interface to synchronous optical network gateway
Abstract
A system of sending and receiving gateways interconnects high speed data interfaces, e.g., HIPPI interfaces, through fiber optic links, e.g., a SONET network. An electronic stripe distributor distributes bytes of data from a first interface at the sending gateway onto parallel fiber optics of the fiber optic link to form transmitted data. An electronic stripe collector receives the transmitted data on the parallel fiber optics and reforms the data into a format effective for input to a second interface at the receiving gateway. Preferably, an error correcting syndrome is constructed at the sending gateway and sent with a data frame so that transmission errors can be detected and corrected in a real-time basis. Since the high speed data interface operates faster than any of the fiber optic links the transmission rate must be adapted to match the available number of fiber optic links so the sending and receiving gateways monitor the availability of fiber links and adjust the data throughput accordingly. In another aspect, the receiving gateway must have sufficient available buffer capacity to accept an incoming data frame. A credit-based flow control system provides for continuously updating the sending gateway on the available buffer capacity at the receiving gateway.
- Inventors:
-
- Los Alamos, NM
- Issue Date:
- Research Org.:
- Los Alamos National Laboratory (LANL), Los Alamos, NM (United States)
- OSTI Identifier:
- 870721
- Patent Number(s):
- 5581566
- Assignee:
- Regents of Univ. of California Office of Technology Transfer (Alameda, CA)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04J - MULTIPLEX COMMUNICATION
- DOE Contract Number:
- W-7405-ENG-36
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- high-performance; parallel; interface; synchronous; optical; network; gateway; sending; receiving; gateways; interconnects; speed; data; interfaces; hippi; fiber; optic; links; sonet; electronic; stripe; distributor; distributes; bytes; optics; link; form; transmitted; collector; receives; reforms; format; effective; input; preferably; error; correcting; syndrome; constructed; frame; transmission; errors; detected; corrected; real-time; basis; operates; faster; rate; adapted; match; available; monitor; availability; adjust; throughput; accordingly; aspect; sufficient; buffer; capacity; accept; incoming; credit-based; flow; control; provides; continuously; updating; real-time basis; transmitted data; fiber optics; flow control; fiber optic; speed data; optical network; receiving gateway; receiving gateways; network gateway; optic link; parallel interface; data frame; synchronous optical; time basis; hippi interfaces; high-performance parallel; /714/
Citation Formats
John, Wallace B, and DuBois, David H. High-performance parallel interface to synchronous optical network gateway. United States: N. p., 1996.
Web.
John, Wallace B, & DuBois, David H. High-performance parallel interface to synchronous optical network gateway. United States.
John, Wallace B, and DuBois, David H. Mon .
"High-performance parallel interface to synchronous optical network gateway". United States. https://www.osti.gov/servlets/purl/870721.
@article{osti_870721,
title = {High-performance parallel interface to synchronous optical network gateway},
author = {John, Wallace B and DuBois, David H},
abstractNote = {A system of sending and receiving gateways interconnects high speed data interfaces, e.g., HIPPI interfaces, through fiber optic links, e.g., a SONET network. An electronic stripe distributor distributes bytes of data from a first interface at the sending gateway onto parallel fiber optics of the fiber optic link to form transmitted data. An electronic stripe collector receives the transmitted data on the parallel fiber optics and reforms the data into a format effective for input to a second interface at the receiving gateway. Preferably, an error correcting syndrome is constructed at the sending gateway and sent with a data frame so that transmission errors can be detected and corrected in a real-time basis. Since the high speed data interface operates faster than any of the fiber optic links the transmission rate must be adapted to match the available number of fiber optic links so the sending and receiving gateways monitor the availability of fiber links and adjust the data throughput accordingly. In another aspect, the receiving gateway must have sufficient available buffer capacity to accept an incoming data frame. A credit-based flow control system provides for continuously updating the sending gateway on the available buffer capacity at the receiving gateway.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Mon Jan 01 00:00:00 EST 1996},
month = {Mon Jan 01 00:00:00 EST 1996}
}
Works referenced in this record:
Inverse multiplexing
journal, April 1994
- Duncanson, J.
- IEEE Communications Magazine, Vol. 32, Issue 4