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Title: Switch for serial or parallel communication networks

Abstract

A communication switch apparatus and a method for use in a geographically extensive serial, parallel or hybrid communication network linking a multi-processor or parallel processing system has a very low software processing overhead in order to accommodate random burst of high density data. Associated with each processor is a communication switch. A data source and a data destination, a sensor suite or robot for example, may also be associated with a switch. The configuration of the switches in the network are coordinated through a master processor node and depends on the operational phase of the multi-processor network: data acquisition, data processing, and data exchange. The master processor node passes information on the state to be assumed by each switch to the processor node associated with the switch. The processor node then operates a series of multi-state switches internal to each communication switch. The communication switch does not parse and interpret communication protocol and message routing information. During a data acquisition phase, the communication switch couples sensors producing data to the processor node associated with the switch, to a downlink destination on the communications network, or to both. It also may couple an uplink data source to its processor node. Duringmore » the data exchange phase, the switch couples its processor node or an uplink data source to a downlink destination (which may include a processor node or a robot), or couples an uplink source to its processor node and its processor node to a downlink destination. 9 figs.

Inventors:
Issue Date:
OSTI Identifier:
6969292
Patent Number(s):
5331315
Application Number:
PPN: US 7-898081
Assignee:
Universities Research Association, Inc., Washington, DC (United States)
DOE Contract Number:  
AC35-89ER40486
Resource Type:
Patent
Resource Relation:
Patent File Date: 12 Jun 1992
Country of Publication:
United States
Language:
English
Subject:
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; ARRAY PROCESSORS; DATA TRANSMISSION; SWITCHES; COMPUTER NETWORKS; DESIGN; COMMUNICATIONS; ELECTRICAL EQUIPMENT; EQUIPMENT; 990200* - Mathematics & Computers

Citation Formats

Crosette, D B. Switch for serial or parallel communication networks. United States: N. p., 1994. Web.
Crosette, D B. Switch for serial or parallel communication networks. United States.
Crosette, D B. Tue . "Switch for serial or parallel communication networks". United States.
@article{osti_6969292,
title = {Switch for serial or parallel communication networks},
author = {Crosette, D B},
abstractNote = {A communication switch apparatus and a method for use in a geographically extensive serial, parallel or hybrid communication network linking a multi-processor or parallel processing system has a very low software processing overhead in order to accommodate random burst of high density data. Associated with each processor is a communication switch. A data source and a data destination, a sensor suite or robot for example, may also be associated with a switch. The configuration of the switches in the network are coordinated through a master processor node and depends on the operational phase of the multi-processor network: data acquisition, data processing, and data exchange. The master processor node passes information on the state to be assumed by each switch to the processor node associated with the switch. The processor node then operates a series of multi-state switches internal to each communication switch. The communication switch does not parse and interpret communication protocol and message routing information. During a data acquisition phase, the communication switch couples sensors producing data to the processor node associated with the switch, to a downlink destination on the communications network, or to both. It also may couple an uplink data source to its processor node. During the data exchange phase, the switch couples its processor node or an uplink data source to a downlink destination (which may include a processor node or a robot), or couples an uplink source to its processor node and its processor node to a downlink destination. 9 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1994},
month = {7}
}

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