Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system
Abstract
A bus switching apparatus and method for multiple processor computer systems comprises a plurality of bus switches interconnected by branch buses. Each processor or other module of the system is connected to a spigot of a bus switch. Each bus switch also serves as part of a backplane of a modular crate hardware package. A processor initiates communication with another processor by identifying that other processor. The bus switch to which the initiating processor is connected identifies and secures, if possible, a path to that other processor, either directly or via one or more other bus switches which operate similarly. If a particular desired path through a given bus switch is not available to be used, an alternate path is considered, identified and secured. 11 figures.
- Inventors:
- Issue Date:
- OSTI Identifier:
- 7271695
- Patent Number(s):
- 4985830 A
- Application Number:
- PPN: US 7-249694
- Assignee:
- Universities Research Association, Inc., Washington, DC (United States) PTO; EDB-94-113727
- DOE Contract Number:
- AC02-76CH03000
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 27 Sep 1988
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; ARRAY PROCESSORS; DATA TRANSMISSION; MODULAR STRUCTURES; PARALLEL PROCESSING; SWITCHES; COMMUNICATIONS; ELECTRICAL EQUIPMENT; EQUIPMENT; PROGRAMMING; 990200* - Mathematics & Computers
Citation Formats
Atac, R., Fischler, M.S., and Husby, D.E. Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system. United States: N. p., 1991.
Web.
Atac, R., Fischler, M.S., & Husby, D.E. Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system. United States.
Atac, R., Fischler, M.S., and Husby, D.E. Tue .
"Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system". United States.
@article{osti_7271695,
title = {Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system},
author = {Atac, R. and Fischler, M.S. and Husby, D.E.},
abstractNote = {A bus switching apparatus and method for multiple processor computer systems comprises a plurality of bus switches interconnected by branch buses. Each processor or other module of the system is connected to a spigot of a bus switch. Each bus switch also serves as part of a backplane of a modular crate hardware package. A processor initiates communication with another processor by identifying that other processor. The bus switch to which the initiating processor is connected identifies and secures, if possible, a path to that other processor, either directly or via one or more other bus switches which operate similarly. If a particular desired path through a given bus switch is not available to be used, an alternate path is considered, identified and secured. 11 figures.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1991},
month = {1}
}