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Title: Partial discharge suppression in high voltage solid-state devices

Abstract

Devices, methods and techniques are disclosed to suppress electrical discharge and breakdown in insulating or encapsulation material(s) applied to solid-state devices. In one example aspect, a multi-layer encapsulation film includes a first layer of a first dielectric material and a second layer of a second dielectric material. An interface between the first layer and the second layer is configured to include molecular bonds to prevent charge carriers from crossing between the first layer and the second layer. The multi-layer encapsulation configuration is structured to allow an electrical contact and a substrate of the solid-state device to be at least partially surrounded by the multi-layer encapsulation configuration.

Inventors:
;
Issue Date:
Research Org.:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Opcondys, Inc., Manteca, CA (United States)
Sponsoring Org.:
USDOE Advanced Research Projects Agency - Energy (ARPA-E)
OSTI Identifier:
1987054
Patent Number(s):
11557646
Application Number:
17/177,884
Assignee:
Lawrence Livermore National Security, LLC (Livermore, CA); Opcondys, Inc. (Manteca, CA)
DOE Contract Number:  
AC52-07NA27344; AR0000907
Resource Type:
Patent
Resource Relation:
Patent File Date: 02/17/2021
Country of Publication:
United States
Language:
English

Citation Formats

Sampayan, Stephen, and Sampayan, Kristin Cortella. Partial discharge suppression in high voltage solid-state devices. United States: N. p., 2023. Web.
Sampayan, Stephen, & Sampayan, Kristin Cortella. Partial discharge suppression in high voltage solid-state devices. United States.
Sampayan, Stephen, and Sampayan, Kristin Cortella. Tue . "Partial discharge suppression in high voltage solid-state devices". United States. https://www.osti.gov/servlets/purl/1987054.
@article{osti_1987054,
title = {Partial discharge suppression in high voltage solid-state devices},
author = {Sampayan, Stephen and Sampayan, Kristin Cortella},
abstractNote = {Devices, methods and techniques are disclosed to suppress electrical discharge and breakdown in insulating or encapsulation material(s) applied to solid-state devices. In one example aspect, a multi-layer encapsulation film includes a first layer of a first dielectric material and a second layer of a second dielectric material. An interface between the first layer and the second layer is configured to include molecular bonds to prevent charge carriers from crossing between the first layer and the second layer. The multi-layer encapsulation configuration is structured to allow an electrical contact and a substrate of the solid-state device to be at least partially surrounded by the multi-layer encapsulation configuration.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jan 17 00:00:00 EST 2023},
month = {Tue Jan 17 00:00:00 EST 2023}
}

Works referenced in this record:

Solar Cell Receiver Having an Insulated Bypass Diode
patent-application, June 2010


An Electronic Device Package
patent-application, December 2018


Semiconductor Device
patent-application, March 2020