Low-temperature vapour-liquid-solid (VLS) growth of vertically aligned silicon oxide nanowires using concurrent ion bombardment.
Vertically aligned silicon oxide nanowires can be synthesized over a large area by a low-temperature, ion-enhanced, reactive vapour-liquid-solid (VLS) method. Synthesis of these randomly ordered arrays begins with a thin indium film deposited on a Si or SiO{sub 2} surface. At the processing temperature of 190 C, the indium film becomes a self-organized seed layer of molten droplets, receiving atomic silicon from a DC magnetron sputtering source rather than from the gaseous precursors used in conventional VLS growth. Simultaneous vigorous ion bombardment aligns the objects vertically and expedites mixing of oxygen and silicon into the indium. Silicon oxide precipitates from each droplet in the form of multiple thin strands having diameters as small as 5 nm. These strands form a single loose bundle growing normal to the surface, eventually consolidating to form one nanowire. The vertical rate of growth can reach 300 nm min{sup -1} in an environment containing argon, hydrogen, and traces of water vapour. This paper discusses the physical and chemical factors leading to the formation of the nanostructures. It also demonstrates how the shape of the resulting nanostructures can be further controlled by sputtering, during both VLS growth and post-VLS processing. Key technological advantages of the developed process are nanowire growth at low substrate temperatures and the ability to form aligned nanostructure arrays, without the use of lithography or templates, on any substrate onto which a thin silicon film can be deposited.
- Research Organization:
- Argonne National Lab. (ANL), Argonne, IL (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC)
- DOE Contract Number:
- DE-AC02-06CH11357
- OSTI ID:
- 985108
- Report Number(s):
- ANL/CSE/JA-62038; TRN: US201016%%1783
- Journal Information:
- Nanotechnology, Vol. 20, Issue 2009
- Country of Publication:
- United States
- Language:
- ENGLISH
Similar Records
High Aspect Ratio Semiconductor Heterojunction Solar Cells
Impact of surface morphology of Si substrate on performance of Si/ZnO heterojunction devices grown by atomic layer deposition technique