Reliability analysis of fault-tolerant reconfigurable nano-architectures

Conference · Thu Jan 01 00:00:00 EST 2004

OSTI ID:977734

Bhaduri, D ^[1]; Graham, P S ^[2]; Shukla, S K ^[3]

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1. Debayan
2. Paul S.
3. Sandeep K.

Manufacturing defects and transient errors will be abundant in high - density reconfigurable nano-scale designs. Recently, we have automated a computational scheme based on Markov Random Field (MRF) and Belief Propagation algorithms in a tool named NANOLAB to evaluate the reliability of nano architectures. In this paper, we show how our methodology can be exploited to design defect- and fault-tolerant programmable logic architectures. The effectiveness of such automation is illustrated by analyzing reconfigurable Boolean networks formed using different industry-based configurable logic blocks (CLBs), both in the presence of thermal perturbations and signal noise.

• Research Organization: Los Alamos National Laboratory (LANL), Los Alamos, NM (United States)
• Sponsoring Organization: USDOE
• OSTI ID: 977734
• Report Number(s): LA-UR-04-4446; TRN: US201012%%523
• Resource Relation: Conference: Submitted to: IEEE International High Level Design Validation and Test Workshop, Nov. 10-12, 2004, Sonoma, CA
• Country of Publication: United States
• Language: English

Related Subjects

77 NANOSCIENCE AND NANOTECHNOLOGY
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
ALGORITHMS
AUTOMATION
DESIGN
ENTROPY
RELIABILITY
SIMULATION
TRANSIENTS
VALIDATION
NANOSTRUCTURES
MICROELECTRONICS
DEFECTS
MITIGATION