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System and method for floating-substrate passive voltage contrast

Patent ·
OSTI ID:963794

A passive voltage contrast (PVC) system and method are disclosed for analyzing ICs to locate defects and failure mechanisms. During analysis a device side of a semiconductor die containing the IC is maintained in an electrically-floating condition without any ground electrical connection while a charged particle beam is scanned over the device side. Secondary particle emission from the device side of the IC is detected to form an image of device features, including electrical vias connected to transistor gates or to other structures in the IC. A difference in image contrast allows the defects or failure mechanisms be pinpointed. Varying the scan rate can, in some instances, produce an image reversal to facilitate precisely locating the defects or failure mechanisms in the IC. The system and method are useful for failure analysis of ICs formed on substrates (e.g. bulk semiconductor substrates and SOI substrates) and other types of structures.

Research Organization:
Sandia National Laboratories (SNL-NM), Albuquerque, NM
Sponsoring Organization:
United States Department of Energy
DOE Contract Number:
AC04-94AL85000
Assignee:
Sandia Corporation (Alburquerque, NM)
Patent Number(s):
7,525,325
Application Number:
11/640,720
OSTI ID:
963794
Country of Publication:
United States
Language:
English

References (2)

The identification and analysis of latent ESD damage on CMOS input gates journal October 1994
Investigation of Sensitivity Improvement on Passive Voltage Contrast for Defect Isolation journal September 2002

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