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Non-preconditioned conjugate gradient on cell and FPGA based hybrid supercomputer nodes

Conference ·

This work presents a detailed implementation of a double precision, non-preconditioned, Conjugate Gradient algorithm on a Roadrunner heterogeneous supercomputer node. These nodes utilize the Cell Broadband Engine Architecture{sup TM} in conjunction with x86 Opteron{sup TM} processors from AMD. We implement a common Conjugate Gradient algorithm, on a variety of systems, to compare and contrast performance. Implementation results are presented for the Roadrunner hybrid supercomputer, SRC Computers, Inc. MAPStation SRC-6 FPGA enhanced hybrid supercomputer, and AMD Opteron only. In all hybrid implementations wall clock time is measured, including all transfer overhead and compute timings.

Research Organization:
Los Alamos National Laboratory (LANL)
Sponsoring Organization:
DOE
DOE Contract Number:
AC52-06NA25396
OSTI ID:
956510
Report Number(s):
LA-UR-09-00248; LA-UR-09-248
Country of Publication:
United States
Language:
English

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