PERI - Auto-tuning Memory Intensive Kernels for Multicore

Conference · Tue Jun 24 04:00:00 EDT 2008

OSTI ID:936521

Bailey, David H; Williams, Samuel; Datta, Kaushik; Carter, Jonathan; Oliker, Leonid; Shalf, John; Yelick, Katherine; Bailey, David H

We present an auto-tuning approach to optimize application performance on emerging multicore architectures. The methodology extends the idea of search-based performance optimizations, popular in linear algebra and FFT libraries, to application-specific computational kernels. Our work applies this strategy to Sparse Matrix Vector Multiplication (SpMV), the explicit heat equation PDE on a regular grid (Stencil), and a lattice Boltzmann application (LBMHD). We explore one of the broadest sets of multicore architectures in the HPC literature, including the Intel Xeon Clovertown, AMD Opteron Barcelona, Sun Victoria Falls, and the Sony-Toshiba-IBM (STI) Cell. Rather than hand-tuning each kernel for each system, we develop a code generator for each kernel that allows us to identify a highly optimized version for each platform, while amortizing the human programming effort. Results show that our auto-tuned kernel applications often achieve a better than 4X improvement compared with the original code. Additionally, we analyze a Roofline performance model for each platform to reveal hardware bottlenecks and software challenges for future multicore systems and applications.

• Research Organization: Ernest Orlando Lawrence Berkeley National Laboratory, Berkeley, CA (US)
• Sponsoring Organization: Computational Research Division; National Energy Research Scientific Computing Division
• DOE Contract Number: AC02-05CH11231
• OSTI ID: 936521
• Report Number(s): LBNL-845E
• Country of Publication: United States
• Language: English

Related Subjects

97 MATHEMATICS AND COMPUTING
A CODES
ALGEBRA
KERNELS
PERFORMANCE
PROGRAMMING
VECTORS
multicore
automatic tuning
performance modeling
sparse matrix-vector multiplication
lattice Boltzmann