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A parallel iterative linear solver for solving irregular grid semiconductor device matrices

Book ·
OSTI ID:87607
; ;  [1]
  1. Univ. of California, Berkeley, CA (United States). Dept. of Electrical Engineering and Computer Sciences
The authors present the use of parallel processors for the solution of drift-diffusion semiconductor device equations using an irregular grid discretization. Preconditioning, partitioning, and communication scheduling algorithms are developed to implement an efficient and robust iterative linear solver with preconditioning. The parallel program is executed on a 64 node CM-5 and is compared with PILS running on a single processor. They observe an efficiency increase in obtaining parallel speed-ups as the problem size increases. They obtain 60% efficiency for CGS with no preconditioning for large problems. Using CGS with processor ILU and magnitude threshold fill-in preconditioning for the CM-5 and CGS with ILU for PILS, they attain 50% efficiency for the solution of the large matrices.
OSTI ID:
87607
Report Number(s):
CONF-941118--; ISBN 0-8186-6605-6
Country of Publication:
United States
Language:
English