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Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

Patent ·
OSTI ID:873901
 [1];  [1];  [1];  [2]
  1. Albuquerque, NM
  2. Tijeras, NM
+ Show Author Affiliations

A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

Research Organization:
SANDIA CORP
DOE Contract Number:
AC04-94AL85000
Assignee:
Sandia Corporation (Albuquerque, NM)
Patent Number(s):
US 6268630
OSTI ID:
873901
Country of Publication:
United States
Language:
English

References (1)

Elimination of bipolar-induced breakdown in fully-depleted SOI MOSFETs conference January 1992

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