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Title: Coplanar interdigitated grid detector with single electrode readout

Patent ·
OSTI ID:873675
 [1]
  1. Castro Valley, CA
+ Show Author Affiliations

The coplanar interdigitated grid technique with single electrode readout provides substantial spectral performance improvement over that of conventional full-area planar electrode detectors and over coplanar interdigitated grid detectors which measure the difference between the induced charge signals from two interdigitated coplanar grid electrodes. The signal from only one interdigitated grid electrode is read out. The signal response is optimized by changing the relative areas of the two grid electrodes and the bias applied across the detector. Only one preamplifier is needed and signal subtraction is not necessary. This eliminates the electronic noise contribution from the additional preamplifier used in the normal coplanar grid implementation, and conventional single-amplifier detector electronics can be used.

Research Organization:
Univ. of California (United States)
DOE Contract Number:
AC03-76SF00098
Assignee:
Regents of University of California (Oakland, CA)
Patent Number(s):
US 6218668
OSTI ID:
873675
Country of Publication:
United States
Language:
English

References (6)

Amorphous Ge bipolar blocking contacts on Ge detectors journal January 1992
A 140-element Ge detector fabricated with amorphous Ge blocking contacts journal January 1994
Performance of CdZnTe coplanar-grid gamma-ray detectors journal June 1996
Electrode design for coplanar-grid detectors journal June 1997
Unipolar charge sensing with coplanar electrodes-application to semiconductor detectors journal January 1995
Amorphous silicon/crystalline silicon heterojunctions for nuclear radiation detector applications journal June 1997

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Related Subjects

coplanar
interdigitated
grid
detector
single
electrode
readout
technique
provides
substantial
spectral
performance
improvement
conventional
full-area
planar
detectors
measure
difference
induced
charge
signals
electrodes
signal
response
optimized
changing
relative
bias
applied
preamplifier
subtraction
eliminates
electronic
noise
contribution
additional
normal
implementation
single-amplifier
electronics
bias applied
charge signal
provides substantial
signal subtraction
single electrode
conventional single
interdigitated grid
coplanar interdigitated
electrode readout
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