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Title: Silicon on insulator achieved using electrochemical etching

Patent ·
OSTI ID:871172

Bulk crystalline silicon wafers are transferred after the completion of circuit fabrication to form thin films of crystalline circuitry on almost any support, such as metal, semiconductor, plastic, polymer, glass, wood, and paper. In particular, this technique is suitable to form silicon-on-insulator (SOI) wafers, whereby the devices and circuits formed exhibit superior performance after transfer due to the removal of the silicon substrate. The added cost of the transfer process to conventional silicon fabrication is insignificant. No epitaxial, lift-off, release or buried oxide layers are needed to perform the transfer of single or multiple wafers onto support members. The transfer process may be performed at temperatures of 50.degree. C. or less, permits transparency around the circuits and does not require post-transfer patterning. Consequently, the technique opens up new avenues for the use of integrated circuit devices in high-brightness, high-resolution video-speed color displays, reduced-thickness increased-flexibility intelligent cards, flexible electronics on ultrathin support members, adhesive electronics, touch screen electronics, items requiring low weight materials, smart cards, intelligent keys for encryption systems, toys, large area circuits, flexible supports, and other applications. The added process flexibility also permits a cheap technique for increasing circuit speed of market driven technologies such as microprocessors at little added expense.

Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
DOE Contract Number:
W-7405-ENG-48
Assignee:
Regents of University of California (Oakland, CA)
Patent Number(s):
US 5674758
OSTI ID:
871172
Country of Publication:
United States
Language:
English

References (7)

Vertically structured silicon membrane by electrochemical etching journal April 1990
Bonding of silicon wafers for silicon‐on‐insulator journal November 1988
Ellipsometric Study of the Etch‐Stop Mechanism in Heavily Doped Silicon journal January 1985
Study of electrochemical etch-stop for high-precision thickness control of silicon membranes journal April 1989
Wafer bonding for silicon‐on‐insulator technologies journal January 1986
Light-controlled, electrochemical, anisotropic etching of silicon conference January 1991
Thermally and electrically isolated single crystal silicon structures in CMOS technology journal October 1994

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