Built-in-test by signature inspection (bitsi)

Patent · Tue Jan 01 04:00:00 EST 1991

OSTI ID:867999

Bergeson, Gary C ^[1]; Morneau, Richard A ^[1]

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1. Idaho Falls, ID

A system and method for fault detection for electronic circuits. A stimulus generator sends a signal to the input of the circuit under test. Signature inspection logic compares the resultant signal from test nodes on the circuit to an expected signal. If the signals do not match, the signature inspection logic sends a signal to the control logic for indication of fault detection in the circuit. A data input multiplexer between the test nodes of the circuit under test and the signature inspection logic can provide for identification of the specific node at fault by the signature inspection logic. Control logic responsive to the signature inspection logic conveys information about fault detection for use in determining the condition of the circuit. When used in conjunction with a system test controller, the built-in test by signature inspection system and method can be used to poll a plurality of circuits automatically and continuous for faults and record the results of such polling in the system test controller.

• Research Organization: EG & G IDAHO INC
• DOE Contract Number: AC07-76ID01570
• Assignee: United States of America as represented by United States (Washington, DC)
• Patent Number(s): US 5051996
• OSTI ID: 867999
• Country of Publication: United States
• Language: English

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