Timing discriminator using leading-edge extrapolation

Patent · Sat Jan 01 04:00:00 EST 1983

OSTI ID:864810

Gottschalk, Bernard ^[1]

---

1. Palo Alto, CA

A discriminator circuit to recover timing information from slow-rising pulses by means of an output trailing edge, a fixed time after the starting corner of the input pulse, which is nearly independent of risetime and threshold setting. This apparatus comprises means for comparing pulses with a threshold voltage; a capacitor to be charged at a certain rate when the input signal is one-third threshold voltage, and at a lower rate when the input signal is two-thirds threshold voltage; current-generating means for charging the capacitor; means for comparing voltage capacitor with a bias voltage; a flip-flop to be set when the input pulse reaches threshold voltage and reset when capacitor voltage reaches the bias voltage; and a clamping means for discharging the capacitor when the input signal returns below one-third threshold voltage.

• Research Organization: Stanford Linear Accelerator Center (SLAC), Menlo Park, CA
• DOE Contract Number: AC03-76SF00515
• Assignee: United States of America as represented by United States (Washington, DC)
• Patent Number(s): US 4421995
• OSTI ID: 864810
• Country of Publication: United States
• Language: English

Related Subjects

/327/
apparatus
apparatus comprise
apparatus comprises
below
bias
bias voltage
capacitor
charged
charging
circuit
clamping
comparing
comprises
comprises means
corner
current-generating
discharging
discriminator
edge
extrapolation
fixed
flip-flop
generating means
independent
information
input
input pulse
input signal
leading-edge
means
nearly
nearly independent
one-third
output
pulse
pulse reaches
pulses
rate
reaches
recover
reset
returns
risetime
set
setting
signal
slow-rising
starting
threshold
threshold voltage
time
timing
timing information
trailing
trailing edge
two-thirds
voltage
voltage capacitor