Skip to main content
U.S. Department of Energy
Office of Scientific and Technical Information

Impurity gettering

Conference ·
OSTI ID:72991

Transition metal impurities are well known to cause detrimental effects when present in the active regions of Si devices. Their presence degrades minority carrier lifetime, provides recombination-generation centers, increases junction leakage current and reduces gate oxide integrity. Thus, gettering processes are used to reduce the available metal impurities from the active region of microelectronic circuits. Gettering processes are usually divided into intrinsic (or internal) and extrinsic (or external) categories. Intrinsic refers to processing the Si wafer in a way to make available internal gettering sites, whereas extrinsic implies externally introduced gettering sites. Special concerns have been raised for intrinsic gettering. Not only will the formation of the precipitated oxide and denuded zone be difficult to achieve with the lower thermal budgets, but another inherent limit may set in. In this or any process which relies on the precipitation of metal silicides the impurity concentration can only be reduced as low as the solid solubility limit. However, the solubilities of transition metals relative to silicide formation are typically found to be {approx_gt}10{sup 12}/cm{sup 3} at temperatures of 800 C and above, and thus inadequate to getter to the needed concentration levels. It is thus anticipated that future microelectronic device processing will require one or more of the following advances in gettering technology: (1) new and more effective gettering mechanisms; (2) quantitative models of gettering to allow process optimization at low process thermal budgets and metal impurity concentrations, and/or (3) development of front side gettering methods to allow for more efficient gettering close to device regions. These trend-driven needs provide a driving force for qualitatively new approaches to gettering and provide possible new opportunities for the use of ion implantation in microelectronics processing.

Research Organization:
Sandia National Labs., Albuquerque, NM (United States)
Sponsoring Organization:
USDOE, Washington, DC (United States)
DOE Contract Number:
AC04-94AL85000
OSTI ID:
72991
Report Number(s):
SAND--95-0794C; CONF-9505211--1; ON: DE95012227
Country of Publication:
United States
Language:
English

Similar Records

Toward understanding and modeling of impurity gettering in silicon
Conference · Tue Aug 01 00:00:00 EDT 1995 · OSTI ID:415138

Impurity diffusion and gettering in silicon
Conference · Mon Dec 31 23:00:00 EST 1984 · OSTI ID:5777359

Extrinsic gettering for VLSI/ULSI processes
Conference · Wed Dec 31 23:00:00 EST 1986 · OSTI ID:6727415