Processor self-scheduling for multiple-nested parallel loops
Technical Report
·
OSTI ID:7258138
Processor self-scheduling is a useful scheme in a multiprocessor system if the execution time of each iteration in a parallel loop is not known in advance and varies substantially, or if there are multiple nestings in parallel loops which makes static scheduling difficult and inefficient. By using efficient synchronization primitives, the operating system is not needed for loop scheduling. The overhead for the processor self-scheduling is small. We presented a processor self-scheduling scheme for a single-nested parallel loop, and extend the scheme to multiple-nested parallel loops. Barrier synchronization mechanisms in the processors self-scheduling schemes are also discussed. 12 references, 2 figs.
- Research Organization:
- Illinois Univ., Urbana (USA). Center for Supercomputing Research and Development
- DOE Contract Number:
- FG02-85ER25001
- OSTI ID:
- 7258138
- Report Number(s):
- DOE/ER/25001-3; ON: DE87002107
- Resource Relation:
- Other Information: Portions of this document are illegible in microfiche products
- Country of Publication:
- United States
- Language:
- English
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