The performance implications of thread management alternatives for shared-memory multiprocessors

Journal Article · Thu Nov 30 23:00:00 EST 1989 · IEEE (Institute of Electrical and Electronics Engineers) Transactions on Computers; (USA)

DOI:https://doi.org/10.1109/12.40843· OSTI ID:7222637

Anderson, T E; Lazowska, E D; Levy, H M ^[1]

---

1. Washington Univ., Seattle, WA (USA). Dept. of Computer Science

Threads (lightweight processes) have become a common element of new languages and operating systems. This paper examines the performance implications of several data structure and algorithm alternatives for thread management in shared-memory multiprocessors. Both experimental measurements and analytical model projections are presented. For applications with fine-grained parallelism, small differences in thread management are shown to have significant performance impact, often posing a tradeoff between throughput and latency. Per-processor data structures can be used to improve throughput, and in some circumstances to avoid locking improving latency as well. The method used by processors to queue for locks is also shown to affect performance significantly. Normal methods of critical resource waiting can substantially degrade performance with moderate numbers of waiting processors. The authors present an Ethernet-style backoff algorithm that largely eliminates this effect.

• OSTI ID: 7222637
• Journal Information: IEEE (Institute of Electrical and Electronics Engineers) Transactions on Computers; (USA), Journal Name: IEEE (Institute of Electrical and Electronics Engineers) Transactions on Computers; (USA) Vol. 38:12; ISSN 0018-9340; ISSN ITCOB
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
ALGORITHMS
ANALYTICAL SOLUTION
ARRAY PROCESSORS
DATA
EXPERIMENTAL DATA
INFORMATION
MATHEMATICAL LOGIC
MEMORY DEVICES
NUMERICAL DATA
PARALLEL PROCESSING
PERFORMANCE TESTING
PROGRAMMING
TESTING